TMS28F010A

1048576-BIT FLASH

ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY

SMJS012 – DECEMBER 1992 – REVISED NOVEMBER 1993

15

POST OFFICE BOX 655303

POST OFFICE BOX 1443

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature

PARAMETER

TEST

ALTERNATE

’28F010A-10

’28F010A-12

’28F010A-15

’28F010A-17

UNIT

PARAMETER

CONDITIONS

SYMBOL

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

ta(A)

Access time from

address, A0 – A16

tAVQV

100

120

150

170

ns

ta(E)

Access time from

chip enable, E

tELQV

100

120

150

170

ns

ten(G)

Access time from

output enable, G

tGLQV

45

50

55

60

ns

tc(R)

Cycle time, read

tAVAV

100

120

150

170

ns

td(E)

Delay time, E low

to low-Z output

CL = 100 pF,

tELQX

0

0

0

0

ns

td(G)

Delay time, G low

to low-Z output

L

1 Series 74

TTL load,

Input t

≤ 20 ns

tGLQX

0

0

0

0

ns

tdis(E)

Chip disable time

to hi-Z output

Input tr ≤ 20 ns,

Input tf ≤ 20 ns

tEHQZ

0

55

0

55

0

55

0

55

ns

tdis(G)

Output disable

time to hi-Z

output

tGHQZ

0

30

0

30

0

35

0

35

ns

th(D)

Hold time, data

valid from

address, E, or G†

tAXQX

0

0

0

0

ns

trec(W)

Write recovery

time before read

tWHGL

6

6

6

6

µs

† Whichever occurs first.