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TS80C31X2-VLED Datasheet(PDF) 30 Page - ATMEL Corporation |
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TS80C31X2-VLED Datasheet(HTML) 30 Page - ATMEL Corporation |
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30 / 42 page ![]() 30 Rev. C - 15 January, 2001 TS80C31X2 Figure 10. Operating ICC Test Condition Figure 11. ICC Test Condition, Idle Mode Figure 12. ICC Test Condition, Power-Down Mode Figure 13. Clock Signal Waveform for ICC Tests in Active and Idle Modes EA VCC VCC ICC (NC) CLOCK SIGNAL All other pins are disconnected. RST XTAL2 XTAL1 VSS VCC P0 Reset = Vss after a high pulse during at least 24 clock cycles RST EA XTAL2 XTAL1 VSS VCC VCC ICC (NC) P0 VCC All other pins are disconnected. CLOCK SIGNAL Reset = Vss after a high pulse during at least 24 clock cycles RST EA XTAL2 XTAL1 VSS VCC VCC ICC (NC) P0 VCC All other pins are disconnected. Reset = Vss after a high pulse during at least 24 clock cycles VCC-0.5V 0.45V 0.7VCC 0.2VCC-0.1 TCLCH TCHCL TCLCH = TCHCL = 5ns. |
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