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6ED003L02-F2 Datasheet(PDF) 7 Page - Infineon Technologies AG |
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6ED003L02-F2 Datasheet(HTML) 7 Page - Infineon Technologies AG |
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7 / 20 page ![]() EiceDRIVER™ 6ED003L06-F2, 6ED003L02-F2 datasheet 7 <Revision 2.8>, 05.08.2016 3 Pin configuration, description, and functionality Figure 3 Pin Configuration of 6ED003L06-F2 and 6ED003L02-F2 Table 2 Pin Description Symbol Description VCC Low side power supply VSS Logic ground /HIN1,2,3 High side logic input /LIN1,2,3 Low side logic input /FAULT Indicates over-current and under-voltage (negative logic, open-drain output) EN Enable I/O functionality (positive logic) ITRIP Analog input for over-current shut down, activates FAULT and RCIN to VSS RCIN External RC-network to define FAULT clear delay after FAULT-Signal (TFLTCLR) COM Low side gate driver reference VB1,2,3 High side positive power supply HO1,2,3 High side gate driver output VS1,2,3 High side negative power supply LO1,2,3 Low side gate driver output nc Not connected 3.1 Low Side and High Side Control Pins (Pin 2, 3, 4, 5, 6, 7) The Schmitt trigger input threshold of them are such to guarantee LSTTL and CMOS compatibility down to 3.3 V controller outputs. Input Schmitt trigger and noise filter provide beneficial noise rejection to short input pulses according to Figure 4 and Figure 5. Figure 4 Input pin structure VCC 1 28 VB1 HIN1 2 27 HO1 HIN2 3 26 VS1 HIN3 4 25 LIN1 5 24 VB2 LIN2 6 23 HO2 LIN3 7 22 VS2 FAULT 8 21 ITRIP 9 20 VB3 EN 10 19 HO3 RCIN 11 18 VS3 VSS 12 17 COM 13 16 LO1 LO3 14 15 LO2 nc nc nc UZ=10.5V INPUT NOISE FILTER Vcc Schmitt-Trigger SWITCH LEVEL VIH; VIL LINx HINx |
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