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STM32F318C8 Datasheet(PDF) 56 Page - STMicroelectronics |
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STM32F318C8 Datasheet(HTML) 56 Page - STMicroelectronics |
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56 / 125 page ![]() Electrical characteristics STM32F318C8 STM32F318K8 56/125 DocID026294 Rev 5 Typical and maximum current consumption The MCU is placed under the following conditions: All I/O pins are in input mode with a static value at VDD or VSS (no load) All peripherals are disabled except when explicitly mentioned The Flash memory access time is adjusted to the fHCLK frequency (0 wait state from 0 to 24 MHz,1 wait state from 24 to 48 MHz and 2 wait states from 48 to 72 MHz) Prefetch in ON (reminder: this bit must be set before clock setting and bus prescaling) When the peripherals are enabled fPCLK2 = fHCLK and fPCLK1 = fHCLK/2 When fHCLK > 8 MHz, the PLL is ON and the PLL input is equal to HSI/2 (4 MHz) or HSE (8 MHz) in bypass mode. The parameters given in Table 24 to Table 30 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 20. Table 24. Typical and maximum current consumption from VDD supply at VDD = 1.8V Symbol Parameter Conditions fHCLK All peripherals enabled All peripherals disabled Unit Typ Max @ TA (1) Typ Max @ TA (1) 25°C 85°C 105°C 25°C 85°C 105°C IDD Supply current in Run mode, executing from Flash External clock (HSE bypass) 72 MHz 43.8 47.6 48.9 52.0 24.7 26.3 26.9 28.1 mA 64 MHz 39.3 42.6 43.7 46.2 22.1 23.6 24.1 25.0 48 MHz 30.0 32.3 33.2 34.8 16.9 18.0 18.4 19.0 32 MHz 20.5 21.8 22.5 23.4 11.6 12.3 12.6 12.9 24 MHz 15.7 16.6 17.2 17.7 8.9 9.4 9.7 10.0 8 MHz 5.3 5.6 5.8 6.4 3.11 3.24 3.45 3.59 1 MHz 0.99 1.13 1.19 1.36 0.71 0.84 0.88 1.03 Internal clock (HSI) 64 MHz 36.2 39.0 39.8 41.8 21.9 23.3 23.7 24.5 48 MHz 27.7 29.7 30.4 31.6 16.7 17.8 18.1 18.6 32 MHz 19.0 20.3 20.7 21.4 11.5 12.2 12.3 12.6 24 MHz 14.6 15.5 15.9 16.3 6.0 6.4 6.5 6.7 8 MHz 5.2 5.5 5.7 5.8 3.09 3.31 3.38 3.51 |
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