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STM32L475RC Datasheet(PDF) 84 Page - STMicroelectronics

Part # STM32L475RC
Description  Ultra-low-power ARM Cortex-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 128 KB SRAM, USB OTG FS, analog, audio
PDF  193 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L475RC Datasheet(HTML) 84 Page - STMicroelectronics

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Electrical characteristics
STM32L475xx
84/193
DocID027692 Rev 2
6.3
Operating conditions
6.3.1
General operating conditions
Table 22. General operating conditions
Symbol
Parameter
Conditions
Min
Max
Unit
fHCLK Internal AHB clock frequency
-
0
80
MHz
fPCLK1 Internal APB1 clock frequency
-
0
80
fPCLK2 Internal APB2 clock frequency
-
0
80
VDD
Standard operating voltage
-
1.71
(1)
3.6
V
VDDA Analog supply voltage
ADC or COMP used
1.62
3.6
V
DAC or OPAMP used
1.8
VREFBUF used
2.4
ADC, DAC, OPAMP, COMP,
VREFBUF not used
0
VBAT
Backup operating voltage
-
1.55
3.6
V
VDDUSB USB supply voltage
USB used
3.0
3.6
V
USB not used
0
3.6
VIN
I/O input voltage
TT_xx I/O
-0.3
VDDIOx+0.3
V
BOOT0
0
9
All I/O except BOOT0 and TT_xx
-0.3
MIN(MIN(VDD, VDDA,
VDDUSB)+3.6 V,
5.5 V)(2)(3)
PD
Power dissipation at
TA = 85 °C for suffix 6
or
TA = 105 °C for suffix 7(4)
LQFP100
-
-
476
mW
LQFP64
-
-
444
TA
Ambient temperature for the
suffix 6 version
Maximum power dissipation
–40
85
°C
Low-power dissipation(5)
–40
105
Ambient temperature for the
suffix 7 version
Maximum power dissipation
–40
105
Low-power dissipation(5)
–40
125
Ambient temperature for the
suffix 3 version
Maximum power dissipation
–40
125
Low-power dissipation(5)
–40
130
TJ
Junction temperature range
Suffix 6 version
–40
105
°C
Suffix 7 version
–40
125
Suffix 3 version
–40
130
1. When RESET is released functionality is guaranteed down to VBOR0 Min.
2. This formula has to be applied only on the power supplies related to the IO structure described by the pin definition table.
Maximum I/O input voltage is the smallest value between MIN(VDD, VDDA, VDDUSB)+3.6 V and 5.5V.
3. For operation with voltage higher than Min (VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must
be disabled.



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