USB82640 datasheet(55/64 Pages) MICROCHIP

55 / 64 page

 2010-2015 Microchip Technology Inc.

DS60001312A-page 55

USB82640

APPENDIX A: DATA SHEET REVISION HISTORY

TABLE 10-1:

CUSTOMER REVISION HISTORY

REVISION LEVEL

& DATE

SECTION/FIGURE/

ENTRY

CORRECTION

DS60001312A

All

• Version migrated to Microchip template.

• Microchip DS number inserted

• Revision A replaces the previous SMSC Rev 1.3.

• Trademark and last page according to Microchip guidelines.

• GPIO functionality removed as the functionality is not sup-

ported any more (except GPO1).

• Package drawing exchanged, QFN -> VQFN

Cover Sheet

• ‘Single-chip USB 2.0 hub controller with 2 exposed hi-speed

downstream ports for external peripheral expansion’ and ‘The

dedicated flash media reader is internally attached to a 3rd

downstream port of the hub as a USB compound device’ ->

‘Single-chip compound device: USB 2.0 hub controller with

two hi-speed downstream ports and a flash media controller’

• Configures internal code using an external I2CTM EEPROM

or SPI ROM -> Configuration of internal code using an exter-

nal I2CTM EEPROM or SPI Flash

• Supports execution of external code from SPI Flash EEPROM

-> Execution of external code from SPI Flash

• Supports custom vendor, product, and language IDs when

using an external EEPROM -> Support of custom vendor,

product, and language IDs when using an external EEPROM

• Removed: 8051 8-bit microprocessor

• Removed: GPIO configuration and polarity for special function

use

Section 1.1, "Device

Features," on page 5

• Section 1.1.2 and Section 1.1.3 merged

• Removed: GPIO configuration and polarity for special function

use

• Removed: 8051 8-bit microprocessor

• implemented in the ...-> loaded by ... where the following fea-

tures are supported:

• added as Secure Digital 2.0 feature:

Supports storage addressability of up to 2 TB

Section 2.0, "Pin

Configuration," on

page 6

• GPIOs removed.

Section 3.0, "Pin

Table," on page 7

• GPIOs removed.

Section 4.0, "Logical

Structure and Block

Diagram," on page 8

• Figure 4-2 adapted, GPIOs removed.

Section 5.0, "Pin

Descriptions," on

page 10

• GPIOs and descriptions describing them removed.

• Term ‘weak pull-up resistors’ replaced by accurate description.

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