WM8756

Advance Information

AI Rev 1.3 October 2001

21

DE-EMPHASIS MODE

Setting the DEEMPH register bit puts the all the digital filters into de-emphasis mode:

REGISTER ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0000010

DAC Channel Control

1

DEEMPH

0

De-emphasis mode select:

0 : Normal Mode

1: De-emphasis Mode

Refer to Figure 20 - Figure 25 for details of the De-Emphasis filtering effects at different sample rates.

In hardware mode (MODE=1) driving the MD/DM pin high has the same effect as setting the DEEMPH bit:

MODE PIN

MD/DM PIN

DESCRIPTION

0

ignored

De-Emphasis controlled from DEEMPH register bit

1

0

Normal Mode

1

1

De-Emphasis Mode

POWERDOWN MODE

All trace of the previous input samples is removed, but all control register settings are preserved. When

PDWN is cleared again the first 16 input samples will be ignored as the FIR will repeat it's power-on

initialisation sequence.

REGISTER ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0000010

DAC Channel Control

2

PDWN

0

Power Down Mode Select:

0 : Normal Mode

1: Power Down Mode

ATTENUATOR CONTROL MODE

Setting the ATC register bit causes the left channel attenuation settings to be applied to both left and right

channels for all three pairs of DACs from the next audio input sample. No update to the attenuation

registers is required for ATC to take effect.

REGISTER ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0000010

DAC Channel Control

3

ATC

0

Attenuator Control Mode:

0 : Right channels use Right

attenuations

1:

Right Channels use Left

Attenuations