DS101077-19

FIGURE 17. Internal Pixel Position Counter

DS101077-20

EEPROM download occurs at first detected Vertical Blanking Period after “RSTZ” signal rising up.

When in “ENAB Only Mode”, VSYNC timing is generated internally when ENAB remains “Low” (No Toggle) for more then 2 line times.

Outputs activation depends on GPO_Control_Register bits [6:5].

EEPROM download occur every 5 frames when TEST[2] = “0”.

When FPD87310 detected no EEPROM connection, the default value will be used for timing generation.

If set Early Start Capability, Outputs might be delayed activate position.

FIGURE 18. Power-Up Sequence and EEPROM Downloading

www.national.com

16