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ADE9078ACPZ Datasheet(PDF) 81 Page - Analog Devices |
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ADE9078ACPZ Datasheet(HTML) 81 Page - Analog Devices |
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81 / 108 page  ADE9078 Data Sheet Rev. 0 | Page 80 of 107 Addr. Name Description Len (Bits) Reset Access 0x06A MTTHR_H4 Multipoint phase/gain threshold--see MTTHR_L0 for more information. 32 0x00000000 R/W 0x06B NIRMSOS Neutral current rms offset for NIRMS calculation. 32 0x00000000 R/W 0x06C ISUMRMSOS Offset correction for ISUMRMS calculation based on the sum of IA + IB + IC ± IN. 32 0x00000000 R/W 0x06D NIGAIN Neutral current gain adjust. 32 0x00000000 R/W 0x06E NPHCAL Neutral current phase compensation. 32 0x00000000 R/W 0x071 VNOM Nominal phase voltage rms used in the computation of apparent power, xVA, when VNOMx_EN bit is set in the CONFIG0 register. 32 0x00000000 R/W 0x072 DICOEFF Value used in the digital integrator algorithm. If the integrator is turned on, with INTEN or ININTEN equal to one in the CONFIG0 register, it is recommended to set this value to 0xFFFFE000. 32 0x00000000 R/W 0x073 ISUMLVL Threshold to compare ISUMRMS against. Configure this register to receive a MISMTCH indication in STATUS0 if ISUMRMS exceeds this threshold. 32 0x00000000 R/W 0x20A AI_PCF Instantaneous Phase A current channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x20B AV_PCF Instantaneous Phase A voltage channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x20C AIRMS Phase A filter based current rms value, updates at 4 kSPS. 32 0x00000000 R 0x20D AVRMS Phase A filter based voltage rms value, updates at 4 kSPS. 32 0x00000000 R 0x210 AWATT Phase A low-pass filtered total active power, updated at 4 kSPS. 32 0x00000000 R 0x211 AVAR Phase A low-pass filtered total reactive power, updated at 4 kSPS. 32 0x00000000 R 0x212 AVA Phase A total apparent power, updated at 4 kSPS. 32 0x00000000 R 0x214 AFVAR Phase A fundamental reactive power, updated at 4 kSPS. 32 0x00000000 R 0x216 APF Phase A power factor, updated at 1.024 sec. 32 0x00000000 R 0x21D AMTREGION If multipoint gain and phase compensation is enabled, with MTEN = 1 in the CONFIG0 register, these bits indicate which AIGAINx and APHCALx is currently being used. 32 0x0000000F R 0x22A BI_PCF Instantaneous Phase B current channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x22B BV_PCF Instantaneous Phase B voltage channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x22C BIRMS Phase B filter based current rms value, updates at 4 kSPS. 32 0x00000000 R 0x22D BVRMS Phase B filter based voltage rms value, updates at 4 kSPS. 32 0x00000000 R 0x230 BWATT Phase B low-pass filtered total active power, updated at 4 kSPS. 32 0x00000000 R 0x231 BVAR Phase B low-pass filtered total reactive power, updated at 4 kSPS. 32 0x00000000 R 0x232 BVA Phase B total apparent power, updated at 4 kSPS. 32 0x00000000 R 0x234 BFVAR Phase B fundamental reactive power, updated at 4 kSPS. 32 0x00000000 R 0x236 BPF Phase B power factor, updated at 1.024 sec. 32 0x00000000 R 0x23D BMTREGION If multipoint gain and phase compensation is enabled, with MTEN = 1 in the COFIG0 register, these bits indicate which BIGAINx and BPHCALx is currently being used. 32 0x0000000F R 0x24A CI_PCF Instantaneous Phase C current channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x24B CV_PCF Instantaneous Phase C voltage channel waveform processed by the DSP, at 4 kSPS. 32 0x00000000 R 0x24C CIRMS Phase C filter based current rms value, updates at 4 kSPS. 32 0x00000000 R |
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