AD9528BCPZ datasheet(65/68 Pages) AD

65 / 68 page

AD9528

Data Sheet

Rev. C | Page 64 of 67

Table 66. LDO Regulator Enable

Address

Bits

Bit Name

Description

0x0503

Channel 7 LDO enable

0: Channel 7 LDO power down

1: normal operation

Channel 6 LDO enable

0: Channel 6 LDO power down

1: normal operation

Channel 5 LDO enable

0: Channel 5 LDO power down

1: normal operation

Channel 4 LDO enable

0: Channel 4 LDO power down

1: normal operation

Channel 3 LDO enable

0: Channel 3 LDO power down

1: normal operation

Channel 2 LDO enable

0: Channel 2 LDO power down

1: normal operation

Channel 1 LDO enable

0: Channel 1 LDO power down

1: normal operation

Channel 0 LDO enable

0: Channel 0 LDO power down

1: normal operation

0x0504

PLL2 LDO enable

0: PLL2 LDO power down

1: normal operation

PLL1 LDO enable

0: PLL1 LDO power down

1: normal operation

Channel 13 LDO enable

0: Channel 13 LDO power down

1: normal operation

Channel 12 LDO enable

0: Channel 12 LDO power down

1: normal operation

Channel 11 LDO enable

0: Channel 11 LDO power down

1: normal operation

Channel 10 LDO enable

0: Channel 10 LDO power down

1: normal operation

Channel 9 LDO enable

0: Channel 9 LDO power down

1: normal operation

Channel 8 LDO enable

0: Channel 8 LDO power down

1: normal operation

AD9528BCPZ Datasheet(PDF) 65 Page - Analog Devices

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