DS2196 datasheet(49/157 Pages) DALLAS

49 / 157 page

DS2196

49 of 157

CCR7A: COMMON CONTROL REGISTER 7 FRAMER A (Address = 0A Hex)

(MSB)

(LSB)

LIRST

RLB

AIS13-24

AIS1-12

DISRCL

–

LBOS3

SYMBOL

POSITION

NAME AND DESCRIPTION

LIRST

CCR7A.7

Line Interface reset. Setting this bit from a 0 to a 1 will

initiate an internal reset that affects the clock recovery state

machine and jitter attenuator. Normally this bit is only toggled

on power–up. Must be cleared and set again for a subsequent

reset.

RLB

CCR7A.6

Remote Loopback.

0 = loopback disabled

1 = loopback enabled

AIS13-24

CCR7A.5

Channels 13 – 24 AIS Enable

0 = do not transmit AIS in channels 13 – 24

1 = transmit AIS in channels 13 - 24

AIS1-12

CCR7A.4

Channels 1 – 12 AIS Enable

0 = do not transmit AIS in channels 1 – 12

1 = transmit AIS in channels 1 - 12

DISRCL

CCR7A.3

LIU Receive Carrier Loss (RCL) pin Disable.

0 = Normal operation.

1 = Disable the LIU RCL pin. Pin will always output a “0”.

The LRCL status bit in RIR3A.3 continues to report correct

LRCL status.

–

CCR7A.2

Not Assigned. Should be set to 0 when written to.

–

CCR7A.1

Not Assigned. Should be set to 0 when written to.

LBOS3

CCR7A.0

Line Build Out Select Bit 3. Sets the transmitter build out; see

the Table 19–1

DS2196 Datasheet(PDF) 49 Page - Dallas Semiconductor

DS2196 Datasheet(HTML) 49 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL