UPD7281 datasheet(12/40 Pages) NEC

Part #	UPD7281

Description	IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER

PDF	40 Pages

Scroll/Zoom	100%

Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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Preliminary Data Sheet S15306EJ2V0DS

µµµµPD72874

1.8 VDD

Name

I/O

Pin No.

IOL

Volts(V)

Function

Block *

PCI_VDD

19, 60

5/3.3

VDD for PCI I/Os

Link

L_VDD

1, 14, 25, 31, 43,

51, 64

-3.3

VDD for Link digital Core and Link I/Os

To use D3cold wake up function, L_VDD must switch

VDD to Vaux when the system suspend.

Link

P_DVDD

73, 79, 82

3.3

PHY digital VDD

PHY Digital

P_AVDD

86, 90, 95, 112

3.3

PHY Analog VDD

PHY Analog

Remark *: If the Link pin is pulled up, it should be connected to L_VDD.

If the PHY Digital pin is pulled up, it should be connected to P_DVDD.

If the PHY Analog pin is pulled up, it should be connected to P_AVDD.

1.9 GND

Name

I/O

Pin No.

IOL

Volts(V)

Function

Block

GND

11, 20, 30, 38, 46,

54, 61, 69, 83, 84,

89, 94, 106, 113,

120

GND

UPD7281 Datasheet(PDF) 12 Page - NEC

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