STCF04TBR datasheet(16/43 Pages) STMICROELECTRONICS

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Detailed description

STCF04

16/43

Doc ID 022927 Rev 3

Detailed description

8.1

Logic pins

8.1.1

SCL, SDA pins

These are the standard CLOCK and DATA pins as defined in the I²C bus specifications.

External pull-ups are required according to I²C bus specifications.

8.1.2

FLASH pin

This input pin is internally AND-ed with the FLASH_ON bit to generate the internal signal

that activates the flash operation. This gives the user the possibility to accurately control the

flash duration using a dedicated pin, avoiding the I²C bus latencies (hard-triggering). Neither

internal pull-up nor pull-down is provided.

8.1.3

TORCH pin

This input pin is internally AND-ed with the TCH_ON bit to generate the internal signal that

activates the torch operation. Neither internal pull-up nor pull-down is provided.

8.1.4

RESET pin

This pin works as an external reset input. The microprocessor can use this pin to reset the

STCF04 at any time. Neither internal pull-up nor pull-down is provided. This pin is active

LOW.

8.1.5

ATN pin

This output pin (open drain, active LOW) is provided to better manage the information

transfer from the STCF04 to the microprocessor. Because of the limitations of a single

master I²C bus configuration, the microprocessor should regularly communicate with the

STCF04 to verify if certain operations have been completed, or to check diagnostic

information. Alternatively, the microprocessor can use the ATN pin to be advised that a new

data is available in the STAT_REG register, therefore avoiding continuous communication.

The information may then be read in the STAT_REG by a read operation via I²C which also

automatically resets the ATN pin to HIGH. The STAT_REG is also reset to 0. No internal

pull-up is provided.

8.1.6

ADD pin

This pin offers the opportunity of selecting one of the 4 possible I²C slave addresses.

Neither internal pull-up nor pull-down is provided. The pin must be connected to GND, VBAT,

SCL or SDA to select the desired I²C slave address (see

Table 7). This pin cannot be left

floating.

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