STCF04TBR datasheet(31/43 Pages) STMICROELECTRONICS

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STCF04

Theory of operation

Doc ID 022927 Rev 3

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10.5

Idle mode

In this mode all internal blocks are turned ON. The DC-DC converter can be enabled by

setting the CHRG bit to 1. If it is enabled, the SuperCap is automatically charged. The NTC

circuit can be activated to monitor the temperature of the LED and I²C commands and

●

from Monitoring when setting the PWR_ON bit

●

from flash operation by resetting the FLASH pin or the FLASH_ON bit, or automatically

from flash operation when the time counter reaches zero

●

from torch operation by resetting the TCH_ON bit.

The device automatically enters this mode also when an overload or an abnormal condition

has been detected during flash or torch operation (see

Table 17).

10.6

AUX LED

The STCF04 is capable of driving an auxiliary LED. Its cathode is always connected to the

AUXLED pin, while its anode can be connected either to the VBAT or VOUT pin. Connecting it

to the VOUT pin is particularly advantageous in case of high AUXLED currents. The

maximum values of AUXLED currents are guaranteed only for anode voltages higher than

3.3 V, but VBAT may range from 2.7 V to 5.5 V, so in some cases it may not be possible to

use maximum currents.

10.7

Single or multiple flash using external (microprocessor)

temporization

To avoid the I²C bus time latency, it is recommended to use the dedicated FLASH pin to

define the flash duration (hard-triggering). The FLASH_ON bit of CMD_REG should be set

before starting each flash operation, because it may have been reset automatically in the

previous flash operation.

The flash duration is determined by the pulse length that drives the FLASH pin. As soon as

the flash is activated, the system needs typically 0.3 ms to ramp up the output current on the

power LED. The internal time counter times out flash operation and keeps the LED

dissipated energy within safe limits in case of software deadlock; the FTIM register must be

set first.

Multiple flashes are possible by strobing the FLASH pin. The timeout counter cumulates

every flash ON-time until the defined timeout is reached unless it is reloaded by updating the

CMD_REG. The number of the flashes depends on VFLED, when the SuperCap is

discharged down to 4.2 V, the device goes automatically into Idle mode. After a flash

operation is timed out, the device automatically enters Idle mode by resetting the

FLASH_ON bit, and it also resets the F_RUN bit. The ATN pin is pulled down to inform the

microprocessor that the STAT_REG has been updated. Multiple flash is possible to trigger

as long as the READY pin is LOW.

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