Copyright 1998 National Semiconductor Corp.

5

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P1[5] or

HOLDACKn

36

2

INPUT/OUTPUT with selectable pull up resistor. General purpose memory

mapped I/O port bit. This pin can be configured as active low HOLD acknowledge.

In Emulation mode HOLDACKn is automatically selected.

P1[6] or

ISE

37

2

INPUT/OUTPUT with selectable pull up resistor. General purpose memory

mapped I/O port. In development mode this pin generates an ISE interrupt to the

CR16A core if high.

P1[7] or

READY

38

4

INPUT/OUTPUT with open drain with 100 mA sink capability. If P1[7] is configured

as READY pin then if HOLDn is ‘1’, this pin will become low upon a read or write

access by an external processor. Can be used to control a LED connected to VDD..

VDD

39

Digital supply voltage.

VSS

40

Digital ground.

P2[0] or

PWM

41

4

INPUT/OUTPUT with open drain with 100mA sink capability. This pin can also be

configured as single ended buzzer driver.

P2[1] or

Buzzer+

42

1

INPUT/OUTPUT. General purpose memory mapped I/O port bit. P2[1,2] can be

configured as complementary PWM output for e.g. buzzer control. P2[1,2] can

drive 12 mA.

P2[2] or

Buzzer-

43

1

INPUT/OUTPUT. General purpose memory mapped I/O port bit. P2[1,2] can be

configured as complementary PWM output for e.g. buzzer control. P2[1,2] can

drive 12 mA.

P2[3] or

STR0

44

1

INPUT/OUTPUT. General purpose memory mapped I/O port bit.

OUTPUT External interface strobe 0.

P2[4] or

STR1

45

1

INPUT/OUTPUT. General purpose memory mapped I/O port bit.

INPUT/OUTPUT. External interface strobe STR1.

TP

46

1

INPUT. Testpin

ICLK

47

1

INPUT/OUTPUT. External interface clock. On rising edge data is valid.

COUT

48

4

INPUT/OUTPUT. External interface data input, codec output. If output, this pin is

configured as an open drain. If the internal codec is used (format 1) an external pull

up resistor is required.

CIN

49

1

INPUT/OUTPUT. PCM interface data output, codec input

TONE

50

1

INPUT. TONE input to capture timer (e.g. metering tones)

P2[5] or

ADC0/DAC0

51

5/analog

DIGITAL OUTPUT/ANALOG INPUT. General purpose input to 8 bit ADC. 8 bit DAC

if ADC0,1,2 are not selected. P2[5] can also be used as a digital output.

P2[6] or

ADC1

52

5/analog

DIGITAL OUTPUT/ANALOG INPUT. General purpose input one to 8 bit ADC

P2[6] can also be used as a digital output.

P2[7] or

ADC2

53

5/analog

DIGITAL OUTPUT/ANALOG INPUT. General purpose input two to 8 bit ADC.

P2[7] can also be used as a digital output.

Vref+

54

analog

OUTPUT. Positive microphone reference voltage.

MIC+

55

analog

INPUT. Microphone positive input.

AGND

56

analog

Signal ground output.

MIC-

57

analog

INPUT. Microphone negative input.

Vref-

58

analog

OUTPUT. Negative microphone reference voltage.

LRS-

59

analog

OUTPUT. Negative loudspeaker output.

LRS+

60

analog

OUTPUT. Positive loudspeaker output

AVD2

61

Analog supply.

AVS2

62

Analog ground.

DAC

63

analog

OUTPUT. 8 bit DAC output e.g. for frequency control

CAP

64

analog

External capacitor for crystal oscillator.

Xtal1

65

analog

INPUT. 10.368 MHz crystal connection.

VSS

66

Digital ground.

VDD

67

Positive supply voltage.

Table 1:

Pin Description)

PIN NAME

NR

TYPE

DESCRIPTION