L99MC6GJ datasheet(37/55 Pages) STMICROELECTRONICS

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L99MC6GJ

SPI control and status register

9.4

Examples

9.4.1

Example 1:Switch on channel 1

It is assumed that the charge pump is already activated (ENCP1 = 1 and DISCP2 = 0, POR

default)

From Table 31 and Table 32 follow that the value 01h is written at RAM address 02h (control

Table 33

describe more in detail the data byte structure.

Hereafter the actions linked to each value of bit or group of bits:



DISCP = 0

: Charge pump stays activated



CH4[2:0] = 000b

: Channel 4 is off, open-load detection in off-state disabled



BRIDGE_1&4 = 0

: Bridge mode disabled



CH4[2:0] = 001b

: Channel 1 is on, high slew rate, PWM not activated, overcurrent

recovery deactivated.

Table 31. Command byte - example 1

MSB

LSB

Operating code

Address

Table 32. Data byte - example 1

MSB

LSB

000

Table 33. Data byte description - example 1

DISCP

CH4

[2]

CH4

[1]

CH4

[0]

Bridge

1&4

CH1

[2]

CH1

[1]

CH1

[0]

000

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