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SRK2001ATR Datasheet(PDF) 14 Page - STMicroelectronics |
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SRK2001ATR Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 20 page ![]() Operation description SRK2001A 14/20 DocID029495 Rev 1 Also at the turn-off, during steady-state load conditions, when the decision depends on the adaptive control circuitry, there is no need to have a very fast drive with hard pull-down, because the current has not yet reached zero and the operation is far from the current inversion occurrence. Moreover, slow transitions also help reducing the perturbation introduced into the system that arise due to the MOSFET turn-on and turn-off, contributing to improve the overall behavior of the LLC resonant converter. The gate-drive circuit is specifically designed to reduce the switching noise at the turn-off, due to parasitic inductance in the driving current path. In fact, during the adaptive turn-off, it provides a controlled turn-off time (with the characteristic two-slope falling edge) in order to limit the current peak during gate drive transition, and does not require any resistor in series to the SR MOSFET gates. On the other side, during very fast load transitions or on a sudden occurrence of the above resonance operation, when the turn-off decision is taken by ZCD_OFF logic, the MOSFET turn-off needs to be very fast to avoid current inversion: therefore, the two gate drivers are designed to guarantee for a very short turn-off total delay. In order to avoid current inversions, the SRK2001A stops driving SR MOSFETs during any operating condition where the converter enters deeply into the below resonance region (i.e. switching frequency gets lower than 60% of resonance frequency). 7.6 EN and PROG pins: function and usage The SRK2001A can enter the low consumption mode in one of the following ways: By EN pin remote on-off (through a small signal NPN transistor) By detecting the primary controller burst-mode operation The PROG pin allows the user to program the conduction duty-cycle of the SR MOSFET body diode to exit the low consumption mode: the configuration choice is done during the start-up phase (when the supply voltage reaches the turn-on level VCC_On) and internally stored as long as VCC is within the supply range. Referring to Figure 9: a precise current generator IPROG, sourcing current to the PROG pin, fixes the voltage across the external resistor RPG; depending on this voltage level, the conduction duty-cycle to exit the low consumption state is set, among those contained in the internal lookup table (see Table 6). After internal storing (pinstrap phase), the current generator IPROG is disabled. In case during the startup the EN pin is kept low, the pinstrap phase will happen only after the EN pin is pulled high. Figure 9. EN - PROG pins configuration |
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