Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

ST7LITE49K2 Datasheet(PDF) 207 Page - STMicroelectronics

Part # ST7LITE49K2
Description  Communication interfaces
PDF  245 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LITE49K2 Datasheet(HTML) 207 Page - STMicroelectronics

Back Button ST7LITE49K2 Datasheet HTML 203Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 204Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 205Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 206Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 207Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 208Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 209Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 210Page - STMicroelectronics ST7LITE49K2 Datasheet HTML 211Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 207 / 245 page
background image
ST7LITE49K2
Electrical characteristics
207/245
Figure 97.
SPI master timing diagram
1.
Measurement points are done at CMOS levels: 0.3xVDD and 0.7xVDD.
2.
When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends of the I/O port
configuration.
13.6
Clock and timing characteristics
Subject to general operating conditions for VDD, fOSC, and TA.
SS INPUT
CPHA = 0
MOSI OUTPUT
MISO INPUT
CPHA = 0
CPHA = 1
CPHA = 1
tc(SCK)
tw(SCKH)
tw(SCKL)
th(MI)
tsu(MI)
MSB IN
MSB OUT
BIT6 IN
BIT6 OUT
LSB OUT
LSB IN
See note 2
Seenote2
CPOL = 0
CPOL = 1
CPOL = 0
CPOL = 1
tr(SCK)
tf(SCK)
th(MO)
tv(MO)
Table 83.
General timings
Symbol
Parameter(1)
1.
Guaranteed by Design. Not tested in production.
Conditions
Min
Typ(2)
2.
Data based on typical application software.
Max
Unit
tc(INST)
Instruction cycle time
fCPU = 8 MHz
23
12
tCPU
250
375
1500
ns
tv(IT)
Interrupt reaction time(3)
tv(IT) = Δtc(INST) + 10
3.
Time measured between interrupt event and interrupt vector fetch.
Δtc(INST) is the number of tCPU cycles
needed to finish the current instruction execution.
fCPU = 8 MHz
10
22
tCPU
1.25
2.75
μs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com