Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

ST72344S2 Datasheet(PDF) 132 Page - STMicroelectronics

Part # ST72344S2
Description  SCI asynchronous serial interface
PDF  247 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72344S2 Datasheet(HTML) 132 Page - STMicroelectronics

Back Button ST72344S2 Datasheet HTML 128Page - STMicroelectronics ST72344S2 Datasheet HTML 129Page - STMicroelectronics ST72344S2 Datasheet HTML 130Page - STMicroelectronics ST72344S2 Datasheet HTML 131Page - STMicroelectronics ST72344S2 Datasheet HTML 132Page - STMicroelectronics ST72344S2 Datasheet HTML 133Page - STMicroelectronics ST72344S2 Datasheet HTML 134Page - STMicroelectronics ST72344S2 Datasheet HTML 135Page - STMicroelectronics ST72344S2 Datasheet HTML 136Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 132 / 247 page
background image
On-chip peripherals
ST72344xx, ST2345xx
132/247
Doc ID 12321 Rev 6
11.5.4
Functional description
The block diagram of the Serial Control Interface, is shown in Figure 63. It contains six
dedicated registers:
●
2 control registers (SCICR1 and SCICR2)
●
A status register (SCISR)
●
A baud rate register (SCIBRR)
●
An extended prescaler receiver register
(SCIERPR)
●
An extended prescaler transmitter register
(SCIETPR)
Refer to the register descriptions in Section 11.5.7 for the definitions of each bit.
Serial data format
Word length may be selected as being either 8 or 9 bits by programming the M bit in the
SCICR1 register (see Figure 64).
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the next
frame which contains data.
A Break character is interpreted on receiving “0”s for some multiple of the frame period. At
the end of the last break frame the transmitter inserts an extra “1” bit to acknowledge the
start bit.
Transmission and reception are driven by their own baud rate generator.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com