ST72361AR4-Auto datasheet(190/279 Pages) STMICROELECTRONICS

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LINSCI serial communication interface (LIN master/slave)

ST72361xx-Auto

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Doc ID 12468 Rev 3

15.10.8

LIN header length register (LHLR)

Read only

Reset value: 0000 0000 (00h)

Note:

In LIN slave mode when LASE = 1 or LHDM = 1, the LHLR register is accessible at the

address of the SCIERPR register.

Otherwise this register is always read as 00h.

Bits 7:0 = LHL[7:0] LIN Header Length.

●

This is a read-only register, which is updated by hardware if one of the following

conditions occurs:

–

After each break detection, it is loaded with “FFh”.

–

If a timeout occurs on THEADER, it is loaded with 00h.

–

After every successful LIN Header reception (at the same time than the setting of

LHDF bit), it is loaded with a value (LHL) which gives access to the number of bit

times of the LIN header length (THEADER). The coding of this value is explained

below:

LHL coding

THEADER_MAX = 57

LHL(7:2) represents the mantissa of (57 - THEADER)

LHL(1:0) represents the fraction (57 - THEADER)

LHL7

LHL6

LHL5

LHL4

LHL3

LHL2

LHL1

LHL0

Table 69.

LHL mantissa coding

LHL[7:2]

Mantissa (57 - THEADER)

Mantissa (THEADER)

...

39h

3Ah

3Bh

Never Occurs

...

3Eh

Never Occurs

3Fh

Initial value

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