ST72361AR4-Auto datasheet(217/279 Pages) STMICROELECTRONICS

217 / 279 page

ST72361xx-Auto

10-bit A/D converter (ADC)

Doc ID 12468 Rev 3

217/279

Bit 7 = EOC End of Conversion

This bit is set by hardware. It is cleared by software reading the ADCDRH register or writing

to any bit of the ADCCSR register.

0: conversion is not complete

1: conversion complete

Bit 6 = SPEED A/D clock selection

This bit is set and cleared by software.

Bit 5 = ADON A/D Converter on

This bit is set and cleared by software.

0: disable ADC and stop conversion

1: enable ADC and start conversion

Bit 4 = SLOW A/D Clock Selection

This bit is set and cleared by software. It works together with the SPEED bit. Refer to

Table 91.

Bits 3:0 = CH[3:0] Channel Selection

These bits are set and cleared by software. They select the analog input to convert.

Table 83.

A/D clock selection

fADC

Slow

Speed

fCPU/2

fCPU (where fCPU <= 4 MHz)

fCPU/4

fCPU/2 (same frequency as SLOW = 0, SPEED = 0)

Table 84.

ADC channel selection

Channel pin(1)

CH3

CH2

CH1

CH0

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

ST72361AR4-Auto Datasheet(PDF) 217 Page - STMicroelectronics

ST72361AR4-Auto Datasheet(HTML) 217 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL