STM32F410RB datasheet(118/142 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F410x8/B

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DocID028094 Rev 5

Figure 40. 12-bit buffered/non-buffered DAC

1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external

loads directly without the use of an external operational amplifier. The buffer can be bypassed by

configuring the BOFFx bit in the DAC_CR register.

6.3.25

RTC characteristics

tWAKEUP(4)

Wakeup time from

off state (Setting

the ENx bit in the

DAC Control

6.5

µs

CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ

input code between lowest

and highest possible ones.

PSRR+ (2)

Power supply

rejection ratio (to

VDDA) (static DC

measurement)

- –67

- 40

dB No RLOAD, CLOAD = 50 pF

1. VDDA minimum value of 1.7 V is obtained with the use of an external power supply supervisor (refer to Section 3.15.2:

Internal reset OFF).

2. Guaranteed by design.

3. The quiescent mode corresponds to a state where the DAC maintains a stable output level to ensure that no dynamic

consumption occurs.

4. Guaranteed based on test during characterization.

Table 77. DAC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Comments

Table 78. RTC characteristics

Symbol

Parameter

Conditions

Min

Max

-fPCLK1/RTCCLK frequency ratio

Any read/write operation

from/to an RTC register

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