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STM32L063C8 Datasheet(PDF) 22 Page - STMicroelectronics |
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STM32L063C8 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 121 page  Functional overview STM32L063x8 22/121 DocID025660 Rev 6 Startup clock After reset, the microcontroller restarts by default with an internal 2 MHz clock (MSI). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts. Clock security system (CSS) This feature can be enabled by software. If an HSE clock failure occurs, the master clock is automatically switched to HSI and a software interrupt is generated if enabled. Another clock security system can be enabled, in case of failure of the LSE it provides an interrupt or wakeup event which is generated if enabled. Clock-out capability (MCO: microcontroller clock output) It outputs one of the internal clocks for external use by the application. Several prescalers allow the configuration of the AHB frequency, each APB (APB1 and APB2) domains. The maximum frequency of the AHB and the APB domains is 32 MHz. See Figure 2 for details on the clock tree. |
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