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HT45F5Q Datasheet(PDF) 87 Page - Holtek Semiconductor Inc |
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HT45F5Q Datasheet(HTML) 87 Page - Holtek Semiconductor Inc |
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87 / 114 page  Rev. 1.10 8� De�e��e� 1�� �01� Rev. 1.10 87 De�e��e� 1�� �01� HT45F5Q Charger Flash MCU HT45F5Q Charger Flash MCU Interrupts Interruptsareanimportantpartofanymicrocontrollersystem.Whenanexternaleventoran internalfunctionsuchasaTimerModuleoranA/Dconverterrequiresmicrocontrollerattention, theircorrespondinginterruptwillenforceatemporarysuspensionofthemainprogramallowing themicrocontrollertodirectattentiontotheirrespectiveneeds.Thedevicecontainsoneexternal interruptandinternalinterruptsfunctions.Theexternalinterruptisgeneratedbytheactionofthe externalINTpin,whiletheinternalinterruptsaregeneratedbyvariousinternalfunctionssuchasthe TM,TimeBase,EEPROM,OVCPandtheA/Dconverter. Interrupt Registers Overallinterruptcontrol,whichbasicallymeansthesettingofrequestflagswhencertain microcontrollerconditionsoccurandthesettingofinterruptenablebitsbytheapplicationprogram, iscontrolledbyaseriesofregisters,locatedintheSpecialPurposeDataMemory,asshowninthe accompanyingtable.Thenumberofregistersdependsuponthedevicechosenbutfallintothree categories.ThefirstistheINTC0~INTC1registerswhichsetuptheprimaryinterrupt,thesecondis theMFI0registerwhichsetuptheMulti-functioninterrupts.FinallythereisanINTEGregisterto setuptheexternalinterrupttriggeredgetype. Eachregistercontainsanumberofenablebitstoenableordisableindividualregistersaswellas interruptflagstoindicatethepresenceofaninterruptrequest.Thenamingconventionofthese followsaspecificpattern.Firstislistedanabbreviatedinterrupttype,thenthe(optional)numberof thatinterruptfollowedbyeitheran“E”forenable/disablebitor“F”forrequestflag. Function Enable Bit Request Flag Notes Glo�al EMI — — INT Pin INTE INTF — Ti�e Base TBnE TBnF n=0 o� 1 Multi-fun�tion MF0E MF0F — OCVP fun�tion OCVPF OCVPE — EEPROM DEE DEF — A/D Conve�te� ADE ADF — TM STMA0E STMA0F — STMP0E STMP0F Interrupt Register Bit Naming Conventions Interrupt Register Contents Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 INTEG — — — — — — INTS1 INTS0 INTC0 — MF0F TB0F INTF MF0E TB0E INTE EMI INTC1 TB1F ADF DEF OCVPF TB1E ADE DEE OCVPE MFI0 — — STMA0F STMP0F — — STMA0E STMP0E |
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