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HMS99C52 Datasheet(PDF) 36 Page - Hynix Semiconductor |
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HMS99C52 Datasheet(HTML) 36 Page - Hynix Semiconductor |
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36 / 43 page ![]() HMS99C5X Series 32 Jan. 2003 Ver 1.0 AC Characteristics for HMS99C5X series (40MHz) External Data Memory Characteristics Advance Information (40MHz) External Clock Drive Parameter Symbol at 40 MHz Clock Variable Clock 1/tCLCL = 3.5 to 40MHz Unit Min. Max. Min. Max. RD pulse width tRLRH 132 - 6tCLCL-50 - ns WR pulse width tWLWH 132 - 6tCLCL-50 - ns Address hold after ALE tLLAX2 10 - tCLCL-20 - ns RD to valid data in tRLDV -81 - 5tCLCL-70 ns Data hold after RD tRHDX 0- 0 - ns Data float after RD tRHDZ -46 - 2tCLCL-15 ns ALE to valid data in tLLDV -153 - 8tCLCL-90 ns Address to valid data in tAVDV -183 - 9tCLCL-90 ns ALE to WR or RD tLLWL 71 111 3tCLCL-20 3tCLCL+20 ns Address valid to WR or RD tAVWL 66 - 4tCLCL-55 - ns WR or RD high to ALE high tWHLH 10 40 tCLCL-20 tCLCL+20 ns Data valid to WR transition tQVWX 5- tCLCL-25 - ns Data setup before WR tQVWH 142 - 7tCLCL-70 - ns Data hold after WR tWHQX 10 - tCLCL-20 - ns Address float after RD tRLAZ -0 - 0 ns Parameter Symbol Variable Oscillator (Freq. = 3.5 to 40MHz) Unit Min. Max. Oscillator period tCLCL 30.3 285.7 ns High time tCHCX 11.5 tCLCL - tCLCX ns Low time tCLCX 11.5 tCLCL - tCHCX ns Rise time tCLCH -5 ns Fall time tCHCL -5 ns |
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