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SCAN90CP02SPX Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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SCAN90CP02SPX Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 12 page  SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6 General Description The SCAN90CP02 is a 1.5 Gbps2x2LVDS crosspoint switch. High speed data paths and flow-through pinout mini- mize internal device jitter, while configurable 0/25/50/100% pre-emphasis overcomes external ISI jitter effects of lossy backplanes and cables. The differential inputs interface to LVDS and Bus LVDS signals such as those on National’s 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The SCAN90CP02 can also be used with ASICs and FPGAs. The non-blocking crosspoint architecture is pin- configurable as a 1:2 clock or data splitter, 2:1 redundancy mux, crossover function, or dual buffer for signal booster and stub hider applications. Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and differential LVDS PCB interconnect. The 3.3V supply, CMOS process, and LVDS I/O ensure high performance at low power over the entire industrial -40 to +85˚C temperature range. Features n 1.5 Gbps per channel n Low power: 70 mA in dual repeater mode @1.5 Gbps n Low output jitter n Configurable 0/25/50/100% pre-emphasis drives lossy backplanes and cables n Non-blocking architecture allows 1:2 splitter, 2:1 mux, crossover, and dual buffer configurations n Flow-through pinout n LVDS/BLVDS/CML/LVPECL inputs, LVDS Outputs n IEEE 1149.1 and 1149.6 compliant n Single 3.3V supply n Separate control of inputs and outputs allows for power savings n Industrial -40 to +85˚C temperature range n 28-lead LLP package, or 32-lead LQFP package Block Diagram 20071401 FIGURE 1. SCAN90CP02 Block Diagram October 2004 © 2004 National Semiconductor Corporation DS200714 www.national.com |
Similar Part No. - SCAN90CP02SPX |
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