ATPL00B datasheet(30/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

Indexed Addressing

Only program Memory can be accessed with indexed addressing, and it can only be read. This addressing

mode is intended for reading look-up tables in Program Memory. A 16-bit base register (either DPTR or

the Program Counter) points to the base of the table, and the Accumulator is set up with the table entry

number.

The address of the table entry in Program Memory is formed by adding the Accumulator data to the base

pointer.

Another type of indexed addressing is used in the “case jump” instruction. In this case the destination

address of a jump instruction is computed as the sum of the base pointer and the Accumulator data.

4.4.3

Arithmetic Instructions

The menu of arithmetic instructions is listed in Table 4-3, which indicates the addressing modes that can be used with

each instruction to access the <byte> operand. For example, the ADD A,<byte> instruction can be written as:

ADD

A, 6EH

(direct addressing)

ADD

A, @R1

(indirect addressing)

ADD

A, R6

(register addressing)

ADD

A, #206

(immediate constant)

The execution times listed in Table 4-3 assume 3 clock cycles per machine cycle (mc), using a 10MHz clock 1 mc is

executed in 0.3us. All the arithmetic instructions execute in 1mc except the Multiply and Divide instructions, which take

2mc.

Note that any byte in the internal Data Memory space can be incremented without going through the Accumulator.

One of the INC instructions operates on the 16-bit Data Pointer. The Data Pointer is used to generate 16-bit addresses

for external memory, so being able to increment it in one 16-bit operation is a useful feature.

The MUL AB instruction multiplies the Accumulator by the data in the B register and puts the 16-bit product into the

concatenated B and Accumulator registers.

The DIV AB instruction divides the Accumulator by the data in the B register and leaves the 8-bit quotient in the

Accumulator, and the 8-bit remainder in the B reg

ister. Oddly enough, DIV AB finds less use in arithmetic “divide”

routines than in radix conversions and programmable shift operations. In shift operations, dividing a number by 2^n

shifts its n bits to the right. Using DIV AB to perform the division completes the shift in 2mc and leaves the B register

holding the bits that were shifted out.

The DA A instruction is for BCD arithmetic operations. In BCD arithmetic, ADD and ADDC instructions should always be

followed by a DA A operation, to ensure that the result is also in BCD. Note that DA A will not convert a binary number

to BCD. The DA A operation produces a meaningful result only as the second step in the addition of two BCD bytes.

ATPL00B Datasheet(PDF) 30 Page - ATMEL Corporation

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