PIC18F4539-ESLASHMLSQTP datasheet(203/322 Pages) MICROCHIP

203 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 201

PIC18FXX39

CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)

U-0

U-1

R/C-1

—

EBTR2(1)

EBTR1

EBTR0

bit 7

bit 0

bit 7-4

Unimplemented: Read as ‘0’

bit 3

Unimplemented and reserved: Maintain as ‘1’

bit 2

EBTR2: Table Read Protection bit(1)

= Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks

= Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks

bit 1

EBTR1: Table Read Protection bit

= Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks

= Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks

bit 0

EBTR0: Table Read Protection bit

= Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks

= Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks

Note 1: Unimplemented in PIC18FX439 devices; maintain this bit set.

Legend:

R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

- n = Value when device is unprogrammed

u = Unchanged from programmed state

U-0

R/C-1

U-0

—

EBTRB

—

bit 7

bit 0

bit 7

Unimplemented: Read as ‘0’

bit 6

EBTRB: Boot Block Table Read Protection bit

= Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks

= Boot block (000000-0001FFh) protected from Table Reads executed in other blocks

bit 5-0

Unimplemented: Read as ‘0’

Legend:

R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

- n = Value when device is unprogrammed

u = Unchanged from programmed state

PIC18F4539-E/MLSQTP Datasheet(PDF) 203 Page - Microchip Technology

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