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PIC18F4539-E/MLSQTP Datasheet(PDF) 231 Page - Microchip Technology

Part # PIC18F4539-E/MLSQTP
Description  Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel
PDF  322 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4539-E/MLSQTP Datasheet(HTML) 231 Page - Microchip Technology

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 2002 Microchip Technology Inc.
Preliminary
DS30485A-page 229
PIC18FXX39
CPFSGT
Compare f with W, skip if f > W
Syntax:
[ label ] CPFSGT f [,a]
Operands:
0
≤ f ≤ 255
a
∈ [0,1]
Operation:
(f)
− (W),
skip if (f) > (W)
(unsigned comparison)
Status Affected:
None
Encoding:
0110
010a
ffff
ffff
Description:
Compares the contents of data
memory location 'f' to the contents
of the W by performing an
unsigned subtraction.
If the contents of 'f' are greater than
the contents of WREG
, then the
fetched instruction is discarded and
a NOP is executed instead, making
this a two-cycle instruction. If ‘a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
No
operation
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
CPFSGT REG, 0
NGREATER
:
GREATER
:
Before Instruction
PC
=
Address (HERE)
W=
?
After Instruction
If REG
>
W;
PC
=
Address (GREATER)
If REG
≤
W;
PC
=
Address (NGREATER)
CPFSLT
Compare f with W, skip if f < W
Syntax:
[ label ] CPFSLT
f [,a]
Operands:
0
≤ f ≤ 255
a
∈ [0,1]
Operation:
(f) –
(W),
skip if (f) < (W)
(unsigned comparison)
Status Affected:
None
Encoding:
0110
000a
ffff
ffff
Description:
Compares the contents of data
memory location 'f' to the contents
of W by performing an unsigned
subtraction.
If the contents of 'f' are less than
the contents of W, then the fetched
instruction is discarded and a NOP
is executed instead, making this a
two-cycle instruction. If ‘a’ is 0, the
Access Bank will be selected. If ‘a’
is 1, the BSR will not be overridden
(default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
No
operation
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
CPFSLT REG, 1
NLESS
:
LESS
:
Before Instruction
PC
=
Address (HERE)
W=
?
After Instruction
If REG
<
W;
PC
=
Address (LESS)
If REG
≥
W;
PC
=
Address (NLESS)



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