PIC18F4539-ESLASHMLSQTP datasheet(263/322 Pages) MICROCHIP

263 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 261

PIC18FXX39

23.1

DC Characteristics: PIC18FXX39 (Industrial, Extended)

PIC18LFXX39 (Industrial)

PIC18LFXX39

(Industrial)

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C

≤ TA ≤ +85°C for industrial

PIC18FXX39

(Industrial, Extended)

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C

≤ TA ≤ +85°C for industrial

-40°C

≤ TA ≤ +125°C for extended

Param

No.

Symbol

Characteristic

Min

Typ

Max Units

Conditions

VDD

Supply Voltage

D001

PIC18LFXX39 2.0

—

5.5

HS Osc mode

D001

PIC18FXX39 4.2

—

5.5

D002

VDR

RAM Data Retention

Voltage(1)

1.5

—

D003

VPOR

VDD Start Voltage

to ensure internal

Power-on Reset signal

—

0.7

See Section 3.1 (Power-on Reset) for details

D004

SVDD

VDD Rise Rate

to ensure internal

Power-on Reset signal

0.05

—

V/ms See Section 3.1 (Power-on Reset) for details

VBOR

Brown-out Reset Voltage

D005

PIC18LFXX39

BORV1:BORV0 = 11 1.98

—

2.14

°C ≥ T ≥ 25°C

BORV1:BORV0 = 10 2.67

—

2.89

BORV1:BORV0 = 01 4.16

—

4.5

BORV1:BORV0 = 00 4.45

—

4.83

D005

PIC18FXX39

BORV1:BORV0 = 1x N.A.

—

N.A.

Not in operating voltage range of device

BORV1:BORV0 = 01 4.16

—

4.5

BORV1:BORV0 = 00 4.45

—

4.83

Legend: Shading of rows is to assist in readability of the table.

Note 1: This is the limit to which VDD can be lowered in SLEEP mode, or during a device RESET, without losing RAM data.

2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin

loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an

impact on the current consumption.

The test conditions for all IDD measurements in active Operation mode are:

OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD

MCLR = VDD; WDT enabled/disabled as specified.

3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is

measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS, and all

features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).

4: The LVD and BOR modules share a large portion of circuitry. The

∆IBOR and ∆ILVD currents are not additive.

Once one of these modules is enabled, the other may also be enabled without further penalty.

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