PIC18F4539-ESLASHMLSQTP datasheet(195/322 Pages) MICROCHIP

195 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 193

PIC18FXX39

19.2.1

REFERENCE VOLTAGE SET POINT

The Internal Reference Voltage of the LVD module may

be used by other internal circuitry (the Programmable

Brown-out Reset). If these circuits are disabled (lower

current consumption), the reference voltage circuit

requires a time to become stable before a low voltage

condition can be reliably detected. This time is invariant

of system clock speed. This start-up time is specified in

electrical specification parameter 36. The low voltage

interrupt flag will not be enabled until a stable reference

voltage is reached. Refer to the waveform in Figure 19-4.

19.2.2

CURRENT CONSUMPTION

When the module is enabled, the LVD comparator and

voltage divider are enabled and will consume static cur-

rent. The voltage divider can be tapped from multiple

places in the resistor array. Total current consumption,

when enabled, is specified in electrical specification

parameter #D022B.

19.3

Operation During SLEEP

When enabled, the LVD circuitry continues to operate

during SLEEP. If the device voltage crosses the trip

point, the LVDIF bit will be set and the device will wake-

up from SLEEP. Device execution will continue from

the interrupt vector address if interrupts have been

globally enabled.

19.4

Effects of a RESET

A device RESET forces all registers to their RESET

state. This forces the LVD module to be turned off.

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