CYW20705 datasheet(4/51 Pages) CYPRESS

4 / 51 page

Document Number: 002-14867 Rev. *F

Page 4 of 51

CYW20705

1. Overview

The Cypress CYW20705 complies with Bluetooth Core Specification, version 4.1 and is designed for use in standard Host Controller

Interface (HCI) UART and HCI USB applications. The combination of the Bluetooth Baseband Core (BBC), a Peripheral Transport

Unit (PTU), and an ARM®-based microprocessor with on-chip ROM provides a complete lower layer Bluetooth protocol stack,

including the Link Controller (LC), Link Manager (LM), and HCI.

1.1 Major Features

Major features of the CYW20705 include:

■ Support for Bluetooth 4.1 + EDR including the following options:

❐ A whitelist size of 25.

❐ Enhanced Power Control

❐ HCI Read Encryption Key Size command

■ Full support for Bluetooth 2.1 + EDR additional features:

❐ Secure Simple Pairing (SSP)

❐ Encryption Pause Resume (EPR)

❐ Enhance Inquiry Response (EIR)

❐ Link Supervision Time Out (LSTO)

❐ Sniff SubRating (SSR)

❐ Erroneous Data (ED)

❐ Packet Boundary Flag (PBF)

■ Built-in Low Drop-Out (LDO) regulators (2)

❐ 1.63 to 5.5V input voltage range

❐ 1.8 to 3.3V intermediate programmable output voltage

■ Integrated RF section

❐ Single-ended, 50 ohm RF interface

❐ Built-in TX/RX switch functionality

❐ TX Class 1 output power capability

❐ RX sensitivity basic rate of –88 dBm

❐ RX sensitivity for Low Energy of –92 dBm

■ Supports maximum Bluetooth data rates over HCI UART, USB, and SPI interfaces

■ Multipoint operation, with up to 7 active slaves

❐ Maximum of 7 simultaneous active ACL links

❐ Maximum of 3 simultaneous active SCO and eSCO links, with Scatternet support

■ Scatternet operation, with up to 4 active piconets (with background scan and support for ScatterMode)

■ High-speed HCI UART transport support

❐ H4 five-wire UART (four signal wires, one ground wire)

❐ H5 three-wire UART (two signal wires, one ground wire)

❐ Maximum UART baud rates of 4 Mbps

❐ Low-power out-of-band BT_WAKE and HOST_WAKE signaling

❐ VSC from host transport to UART

❐ Proprietary compressing scheme (allows more than 2 simultaneous A2DP packets and up to 5 devices at a time)

■ HCI USB transport support

❐ USB version 2.0 full-speed compliant interface

❐ Full USB hub

❐ UHE (proprietary method for emulating a Human Interface Device (HID) at system bootup)

■ Channel Quality-Driven Data Rate (CQDDR) and packet type selection

■ Standard Bluetooth test modes

■ Extended radio and production test mode features

CYW20705 Datasheet(PDF) 4 Page - Cypress Semiconductor

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