CYW20705 datasheet(9/51 Pages) CYPRESS

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Document Number: 002-14867 Rev. *F

Page 9 of 51

CYW20705

2.5 Internal LDO

Two internal Low Drop-Out (LDO) voltage regulators eliminate the need for external voltage regulators and therefore reduce the BOM.

The first LDO is a preregulator (HV LDO). The second LDO (Main LDO) supplies the main power to the CYW20705 (see Figure 4).

The HV LDO has an input voltage range of 2.3V to 5.5V. The input VBAT is ideal for batteries. The VREGHV output is programmable

from 1.8V to 3.3V, in 100 mV steps. The dropout voltage is 200 mV. The HV LDO can supply up to 95 mA, which leaves spare power

for external circuitry such as an RF power amp for higher transmit power. If the HV LDO is not used, to turn off the HV LDO and

minimize current consumption, connect the VBAT input to the VREGHV output. Firmware can then disable the HV LDO, saving the

quiescent current.

The HV LDO default output voltage is 2.9V, allowing this regulator to be used to power external NV memory devices, as well as the

VDDO rail. The firmware can then adjust this output to as low as 1.8V, if desired, to power VDDTF.

The main LDO has a 1.22V output (VREG) and is used to supply main power to the CYW20705. The input of this LDO (VREGHV)

has an input voltage range of from 1.63V to 3.63V. The output of the HV LDO is internally connected to the input to the main LDO.

Power can be applied to VREGHV when the HV LDO is not used. The main LDO supplies power to the entire device for Class 2

operation. The main LDO can drive up to 60 mA, which leaves spare power for external circuitry. The main LDO is bypassed by not

connecting anything to its output (VREG) and driving 1.12V–1.32V directly to VDDC and VDDRF.

REG_EN provides a control signal for the host to control power to the CYW20705. When power is enabled, the CYW20705 will require

complete initialization.

Figure 4. LDO Functional Block Diagram

HV LDO

Main LDO

VREGHV

VBAT

VREG

REG_EN

CYW20705 Datasheet(PDF) 9 Page - Cypress Semiconductor