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DG534AAP/883 Datasheet(PDF) 14 Page - Vishay Siliconix |
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DG534AAP/883 Datasheet(HTML) 14 Page - Vishay Siliconix |
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14 / 16 page ![]() DG534A/538A Vishay Siliconix www.vishay.com 14 Document Number: 70069 S-05734—Rev. G, 29-Jan-02 PIN DESCRIPTION Pin Number Symbol DG534ADJ DG538A Description DA 2 2 Analog Output/Input V+ 3 3 Positive Supply Voltage SA1 4 4 Analog Input/Output SA2 6 6 Analog Input/Output SA3 – 8 Analog Input/Output SA4 – 10 Analog Input/Output 4/2 7 – 4 x 1 or 2 x 2 Select 8/4 – 11 8 x 1 or 4 x 2 Select RS 8 12 Reset WR 9 13 Write command that latches A, EN A0, A1, A2 11, 10, – 16, 15, 14 Binary address inputs that determine which channel(s) is/are connected to the out- put(s) EN 12 17 Enable. Input/Output, if EN = 0, all channels are open I/O 13 18 Input/Output control. Used to write to or read from the address latches VL 14 19 Logic Supply Voltage, usually +5 V SB4 – 20 Analog Input/Output SB3 – 22 Analog Input/Output SB2 15 24 Analog Input/Output SB1 17 26 Analog Input/Output V– 18 27 Negative Supply Voltage DB 19 28 Analog Output/Input GND 1, 5, 16 1, 5, 7, 9, 21, 23, 25 Analog and Digital Grounds. All grounds should be connected externally to optimize dynamic performance APPLICATIONS Device Description The DG534A/538A D/CMOS wideband multiplexers offer single-ended or differential functions. A 8/4 or 4/2 logic input pin selects the single-ended or differential mode. To meet the high dynamic performance demands of video, high definition TV, digital data routing (in excess of 100 Mbps), etc., the DG534A/538A are fabricated with DMOS transistors configured in ‘T’ arrangements with second level ‘L’ configurations (see Functional Block Diagram). Use of DMOS technology yields devices with very low capacitance and low rDS(on). This directly relates to improved high frequency signal handling and higher switching speeds, while maintaining low insertion loss figures. The ‘T’ and ‘L’ switch configurations further improve dynamic performance by greatly reducing crosstalk and output node capacitances. The DG534A/DG538A are improved pin-compatible replacements for the non-A versions. Improvements include: higher current readback drivers, readback of the EN bit, latchup protection Frequency Response A single multiplexer on-channel exhibits both resistance [rDS(on)] and capacitance [CS(on)]. This RC combination causes a frequency dependent attenuation of the analog signal. The –3-dB bandwidth of the DG534A/538A is typically 500 MHz (into 50 W). This figure of 500 MHz illustrates that the switch-channel cannot be represented by a simple RC combination. The on capacitance of the channel is distributed along the on-resistance, and hence becomes a more complex multi-stage network of R’s and C’s making up the total rDS(on) and CS(on). |
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