ISL8014IRZ datasheet(13/17 Pages) RENESAS

13 / 17 page

ISL8014

FN6576 Rev 4.00

Page 13 of 17

November 23, 2009

Short-Circuit Protection

The short-circuit protection SCP comparator monitors the

VFB pin voltage for output short-circuit protection. When

the VFB is lower than 0.2V, the SCP comparator forces

the PWM oscillator frequency to drop to 1/3 of the normal

operation value. This comparator is effective during

start-up or an output short-circuit event.

During power-up, the open-drain power good output

holds low for about 1ms after VOUT reaches the

regulation voltage. The PG output also serves as a 1ms

delayed the Power Good signal when the pull-up resistor

R1 is installed.

Soft Start-Up

The soft-start-up reduces the inrush current during the

start-up. The soft-start block outputs a ramp reference to

the input of the error amplifier. This voltage ramp limits

the inductor current as well as the output voltage speed

so that the output voltage rises in a controlled fashion.

When VFB is less than 0.2V at the beginning of the

soft-start, the switching frequency is reduced to 1/3 of

the nominal value so that the output can start up

smoothly at light load condition. During soft-start, the IC

operates in the SKIP mode to support pre-biased output

condition.

UVLO

When the input voltage is below the undervoltage lock-

out (UVLO) threshold, the regulator is disabled. To adjust

the voltage level of power on and UVLO, use a resistive

divider across EN. The input voltage programming

resistor R4 will depend on on the bottom resistor R5, as

referred to in Figure 38. The value of R5 is typically

between 10k and 100k.

Enable

The enable (EN) input allows the user to control the

turning on or off the regulator for purposes such as

power-up sequencing. When the regulator is enabled,

there is typically a 600µs delay for waking up the

bandgap reference and then the soft-start-up begins. It

is recommended that the EN voltage should be kept logic

low (less than 400mV), until VIN reaches 2.5V. Refer to

Figures 38 and 39 for suggested circuit implementation

with VIN slew rate.

Let T equal the rise time of VIN. Select the ratio of R5 and

R4 such that the voltage is 1.4V (minimum enable logic

high threshold) when VIN is equal to or greater than

2.5V. Set R5 between 10k to 100k, and use Equation 1

to determine R4:

Where VIN is greater than or equal to 2.5V.

Then select C such that the equivalent time constant is at

least 2x the rise time, T. This will delay the EN voltage

enough so that the overall EN voltage is less than 400mV

by the time VIN reaches 2.5V. Use Equation 2 to get C:

Where T is the rise time of VIN

As an example, let VIN = 5V with rise time, T = 10ms.

Then R4 = 56.2k, R5 = 71.5k, and C = 0.68µF are

used to insure that VIN was >2.5V and the EN voltage

was <400mV.

Discharge Mode (Soft-Stop)

When a transition to shutdown mode occurs or the VIN

UVLO is set, the outputs discharge to GND through an

internal 100 switch.

Power MOSFETs

The power MOSFETs are optimized for best efficiency.

The ON-resistance for the P-MOSFET is typically 50m

and the ON-resistance for the N-MOSFET is typically

50m.

100% Duty Cycle

The ISL8014 features 100% duty cycle operation to

maximize the battery life. When the battery voltage

drops to a level that the ISL8014 can no longer maintain

the regulation at the output, the regulator completely

turns on the P-MOSFET. The maximum dropout voltage

under the 100% duty-cycle operation is the product of

the load current and the ON-resistance of the P-MOSFET.

VIN

FIGURE 38. EXTERNAL RESISTOR DIVIDER

FIGURE 39. CIRCUIT IMPLEMENTATION WITH VIN

SLEW RATE

VIN

<400mV

2.5V

t (TIME)

R5 VIN 1.4V

–





1.4V

---------------------------------------------

(EQ. 1)



R4 R5



--------------------



(EQ. 2)

ISL8014IRZ Datasheet(PDF) 13 Page - Renesas Technology Corp

ISL8014IRZ Datasheet(HTML) 13 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Datasheet Download

Link URL