P89LPC913 datasheet(10/63 Pages) PHILIPS

10 / 63 page

Philips Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 03 — 17 December 2004

10 of 63

9397 750 14468

Table 4:

P89LPC913 pin description

Symbol

Type

Description

P0.2,

P0.4 to P0.6

I/O

Port 0: Port 0 is a 4-bit I/O port with a user-conﬁgurable output type. During reset

Port 0 latches are conﬁgured in the input only mode with the internal pull-up disabled.

The operation of Port 0 pins as inputs and outputs depends upon the port

conﬁguration selected. Each port pin is conﬁgured independently. Refer to Section

9.11.1 “Port conﬁgurations” and Table 13 “DC electrical characteristics” for details.

The Keypad Interrupt feature operates with Port 0 pins.

All pins have Schmitt triggered inputs.

Port 0 also provides various special functions as described below:

I/O

P0.2 — Port 0 bit 2.

CIN2A — Comparator 2 positive input A.

KBI2 — Keyboard input 2.

I/O

P0.4 — Port 0 bit 4.

CIN1A — Comparator 1 positive input A.

KBI4 — Keyboard input 4.

I/O

P0.5 — Port 0 bit 5.

CMPREF — Comparator reference (negative) input.

KBI5 — Keyboard input 5.

I/O

P0.6 — Port 0 bit 6.

CMP1 — Comparator 1 output.

KBI6 — Keyboard input 6.

P1.0, P1.1,

P1.5

I/O

(P1.0,

P1.1);

I (P1.5)

Port 1: Port 1 is a 3-bit I/O port with a user-conﬁgurable output type, except for P1.5

noted below. During reset Port 1 latches are conﬁgured in the input only mode with

the internal pull-up disabled. The operation of the conﬁgurable Port 1 pins as inputs

and outputs depends upon the port conﬁguration selected. Each of the conﬁgurable

port pins are programmed independently. Refer to Section 9.11.1 “Port

conﬁgurations” and Table 13 “DC electrical characteristics” for details. P1.5 is input

only.

All pins have Schmitt triggered inputs.

Port 1 also provides various special functions as described below:

I/O

P1.0 — Port 1 bit 0.

TxD — Transmitter output for the serial port.

I/O

P1.1 — Port 1 bit 1.

RxD — Receiver input for the serial port.

P1.5 — Port 1 bit 5 (input only).

RST — External Reset input during Power-on or if selected via UCFG1. When

functioning as a reset input, a LOW on this pin resets the microcontroller, causing I/O

ports and peripherals to take on their default states, and the processor begins

execution at address 0. Also used during a power-on sequence to force In-System

Programming mode. When using an oscillator frequency above 12 MHz, the

reset input function of P1.5 must be enabled. An external circuit is required to

hold the device in reset at power-up until VDD has reached its speciﬁed level.

When system power is removed VDD will fall below the minimum speciﬁed

operating voltage. When using an oscillator frequency above 12 MHz, in some

applications, an external brownout detect circuit may be required to hold the

device in reset when VDD falls below the minimum speciﬁed operating voltage.

P89LPC913 Datasheet(PDF) 10 Page - NXP Semiconductors

P89LPC913 Datasheet(HTML) 10 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

Datasheet Download

Link URL