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GMS77C1001 Datasheet(PDF) 21 Page - Hynix Semiconductor |
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GMS77C1001 Datasheet(HTML) 21 Page - Hynix Semiconductor |
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21 / 44 page ![]() GMS77C1000/GMS77C1001 18 July. 2001 Ver. 1.1 9. MEMORY The GMS77C1000/1001 has separate memory maps for program memory and data memory. Program memory can only be read, not written to. It can be up to 1K words of program memory. Data memory can be read and written to 32 bytes including special function registers. 9.1 Program Memory The program memory is organized as 0.5K, 12-bit wide w o rds(G M S77C1000) and 1K , 12-bit w i de words(GMS77C1001). The program memory words are addressed sequentially by a program counter. Increment- ing at locat ion 1 F F H (G MS7 7 C100 0) or 3F F H (GMS77C1001) will cause a wrap around to 000H. Figure 9-1 and Figure 9-2 show a map of program memo- ry. After reset, CPU begins execution from reset vector which is stored in address(1FFH: GMS77C1000, 3FFH: GMS77C1001). 9.2 Data Memory The data memory consists of 25 bytes of RAM and seven special function registers. The data memory locations are addressed directly or indirectly by using FSR. Figure 9-3 shows a map of data memory. The special func- tion registers are mapped into the data memory.. FIGURE 9-1 GMS77C1000 PROGRAM MEMORY MAP AND STACK PC<8:0> Stack Level 1 Stack Level 2 Reset Vector On-chip Program Memory 000H 0FFH 100H 1FFH FIGURE 9-2 GMS77C1001 PROGRAM MEMORY MAP AND STACK FIGURE 9-3 GMS77C1000/1 DATA MEMORY MAP PC<9:0> Stack Level 1 Stack Level 2 Reset Vector On-chip Program Memory 000H 0FFH 100H 3FFH On-chip Program Memory 2FFH 300H 1FFH 200H (Page 0) (Page 1) 0FH 10H 1FH INDF TMR0 PCL STATUS FSR RA RB 00H 01H 02H 03H 04H 05H 06H File Address Special Function Registers 00H 06H 07H DATA MEMORY (SRAM) DATA MEMORY (SRAM) |
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