56F8014 datasheet(63/124 Pages) FREESCALE

63 / 124 page

56F8014 Technical Data, Rev. 3

Freescale Semiconductor

Preliminary

6.3 Register Descriptions

Table 6-1 SIM Registers (SIM_BASE = $00 F140)

Address Offset

Address Acronym

Section Location

Base + $0

SIM_CTRL

Control Register

6.3.1

Base + $1

SIM_RSTAT

Reset Status Register

6.3.2

Base + $2

SIM_SWC0

Software Control Register 0

6.3.3

Base + $3

SIM_SWC1

Software Control Register 1

6.3.3

Base + $4

SIM_SWC2

Software Control Register 2

6.3.3

Base + $5

SIM_SWC3

Software Control Register 3

6.3.3

Base + $6

SIM_MSHID

Most Significant Half of JTAG ID

6.3.4

Base + $7

SIM_LSHID

Least Significant Half of JTAG ID

6.3.5

Base + $8

SIM_PWR

Power Control Register

6.3.6

Reserved

Base + $A

SIM_CLKOUT

CLKO Select Register

6.3.7

Base + $B

SIM_GPS

GPIO Peripheral Select Register

6.3.8

Base + $C

SIM_PCE

Peripheral Clock Enable Register

6.3.9

Base + $D

SIM_IOSAHI

I/O Short Address Location High Register

6.3.10

Base + $E

SIM_IOSALO

I/O Short Address Location Low Register

6.3.10

56F8014 Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc

56F8014 Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc

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