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56F8014 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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56F8014 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 124 page ![]() 56F8014 Technical Data, Rev. 3 10 Freescale Semiconductor Preliminary Figure 1-3 56F8014 Peripheral I/O Pin-Out To/From IPBus Bridge 3 to PWM Sync0, Sync1 Over/Under Limits ADC ANA0, 1, 3 ANA2 VREFH, VREFL ANB2 ANB0, 1, 3 IPBus 3 2 VREFH, VREFL ANA2 ANB2 ANA0, 1, 3 3 SPI I2C SCI 2 T2o, T3o T3i T2/3 T1 T0 Timer PWM PWM0 - 3 Fault3 Fault0 Fault1, 2 PWM4, 5 PWM4, 5 PWM0 - 3 Fault1, 2 Fault0 Fault3 T2, 3 2 3 from ADC I2C is muxed with both SPI amd SCI. T2 and T3 are muxed with SPI and PWM. T1 T0 CLKO TXD, RXD 2 2 2 2 T2, 3 ANB0, 1, 3 GPIOA0 - 3 GPIOA4 - 5 GPIOA6 GPIOB5 GPIOB4 GPIOB6 - 7 GPIOB0 - 1 GPIOB2 - 3 GPIOC0, 1, 3 GPIOC2, 6 GPIOC4, 5, 7 SDA, SCL SCLK, SS MISO, MOSI 4 2 2 Output Controls 2 2 2 (Continued from Figure 1-2) Reload Pulse |
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