DSP56857 datasheet(289/662 Pages) FREESCALE

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Error Conditions

Serial Peripheral Interface (SPI), Rev. 4

Freescale Semiconductor

11-19

Figure 11-12. Clearing SPRF When OVRF Interrupt is Not Enabled

11.9.2 Mode Fault Error

Setting the SPMSTR bit selects the Master mode, configuring the SCLK and MOSI pins as

outputs and the MISO pin as an input. Clearing SPMSTR selects the Slave mode, configuring the

SCLK and MOSI pins as inputs and the MISO pin as an output. The Mode Fault (MODF) bit

becomes set any time the state of the Slave Select (SS) pin is inconsistent with the mode selected

by SPMSTR. To prevent SPI pin contention and damage to the DSC, a Mode Fault Error occurs

if:

•The SS pin of a Slave SPI goes high during a transmission.

•The SS pin of a Master SPI goes low at any time.

To set the MODF flag, the Mode Fault Error Enable (MODFEN) bit must be set. Clearing the

MODFEN bit does not clear the MODF flag, but it does prevent the MODF from being set again

after the MODF is cleared.

MODF generates a Receiver/Error Interrupt request if the Error Interrupt Enable (ERRIE) bit is

also set. It is not possible to enable MODF or OVRF individually to generate a Receiver/Error

Interrupt request. However, leaving MODFEN low prevents MODF from being set.

READ SPDRR

READ SPSCR

OVRF

SPRF

DATA 1

DATA 2

DATA 3

DATA 4

DATA 1 SETS SPRF BIT.

DSC READS SPSCR WITH SPRF BIT SET

DSC READS DATA 1 IN SPDRR,

DSC READS SPSCR AGAIN

DATA 2 SETS SPRF BIT.

DSC READS SPSCR WITH SPRF BIT SET

DATA 3 SETS OVRF BIT. DATA 3 IS LOST.

DSC READS DATA 2 IN SPDRR,

DSC READS SPSCR AGAIN

DSC READS DATA 2 SPDRR,

DATA 4 SETS SPRF BIT.

DSC READS SPSCR.

DSC READS DATA 4 IN SPDRR,

DSC READS SPSCR AGAIN

CLEARING SPRF BIT.

TO CHECK OVRF BIT.

CLEARING SPRF BIT.

TO CHECK OVRF BIT.

CLEARING OVRF BIT.

CLEARING SPRF BIT.

TO CHECK OVRF BIT.

SPI RECEIVE

COMPLETE

AND OVRF BIT CLEAR.

DSP56857 Datasheet(PDF) 289 Page - Freescale Semiconductor, Inc

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