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DSP56857 Datasheet(PDF) 297 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 297 Page - Freescale Semiconductor, Inc |
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297 / 662 page  SPI Register Descriptions (SPI_BASE = $1FFFE8) Serial Peripheral Interface (SPI), Rev. 4 Freescale Semiconductor 11-27 • 0 = Transmitter DMA mode disabled • 1 = Transmitter DMA mode enabled 11.11.2.3 Receiver DMA Enable (RDMAEN)—Bit 13 In the DMA mode, normal interrupts (not error) are suppressed and a DMA Request is generated instead. The requirement for clearing SPRF/SPTE changes to read/write the SPDRR/SPDTR, thereby eliminating the read of SPSCR. • 0 = Receiver DMA mode disabled • 1 = Receiver DMA mode enabled 11.11.2.4 Reserved—Bits 12–4 This bit field is reserved or not implemented. It is read as 0, but cannot be modified by writing. 11.11.2.5 Transmission Data Size (TDS)—Bits 3–0 Please see Table 11-5 for detailed transmission data. Table 11-5. Transmission Data Size DS3 - DS0 Size of Transmission 0Not Allowed 12 bits 23 bits 34 bits 45 bits 56 bits 67 bits 78 bits 89 bits 9 10 bits 10 11 bits 11 12 bits 12 13 bits 13 14 bits 14 15 bits 15 16 bits |
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