DSP56857 datasheet(307/662 Pages) FREESCALE

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Signal Descriptions

Enhanced Synchronous Serial Interface (ESSI), Rev. 4

Freescale Semiconductor

12-7

signal for Transmit Shift register TX1 or for Serial Flag I/O. A typical application of Serial Flag

I/O would be multiple device selection for addressing in codec systems.

If SC0 is configured as a serial flag signal or receive clock signal, its direction is determined by

the Serial Control Direction 0 (SCD0) bit in the ESSI Control Register 4 (SCR4). When

configured as an output, SC0 may be used either as the serial Output Flag 0 (OF0) or as a Receive

Shift register clock output. If the SC0 is used as the serial OF0, its value is determined by the

value of the serial OF0 bit in the SCR4 register.

If SC0 is an input, this signal may be used either as serial Input Flag 0 (IF0) or as a Receive Shift

Input Flag 0 bit in the ESSI Status Register (ESSR). When SC0 is configured as a transmit data

signal, it is always an output signal regardless of the SCD0 bit value. SC0 is fully synchronized

with the other transmit data signals, STD and SC1.

Note:

The ESSI can operate with more than one active transmitter only in the Synchronous

mode.

12.3.2.3 ESSI Receive Frame Sync (SC1)

The function of this signal is determined by the programmer selecting either Synchronous or

Asynchronous modes, according to Table 12-4. In the Asynchronous mode, such as a single

codec with asynchronous transmit and receive, the SC1is the receiver frame sync I/O. In the

Synchronous mode, the SC1 is used for the transmitter data out signal of Transmit Shift Register

(TXSR2), for the transmitter 0 drive-enable signal, or for serial flag I/O.

When used as serial flag I/O, SC1operates like SC0. SC0 and SC1 are independent flags, but they

may be used together for multiple serial device selection. SC0 and SC1 can be used without being

encoded to select up to two codecs. They may also be decoded externally to select up to four

codecs. If the SC1 is configured as a serial flag signal, its direction is determined by the SCD1 bit

in SCR4 register.

If the SC1 is configured as a serial flag or receive frame sync signal, its direction is determined

by the Serial Control Direction 1 (SCD1) bit in the SCR4 register.

When configured as an output, the SC1 signal can be used as a serial output flag, as the

transmitter 0 drive-enable signal for the purpose to control an external high-drive buffer, or as the

receive frame sync signal output. If SC1 is used as serial output flag 1, its value is determined by

the value of the serial Output Flag 1 (OF1) bit in the SCR4 register.

When configured as an input, this signal can be used to receive frame sync signals from an

external source, or it can be used as a serial input flag. When SC1 is a serial input flag, it controls

status bit IF1 in the SSR.

DSP56857 Datasheet(PDF) 307 Page - Freescale Semiconductor, Inc