DSP56857 datasheet(459/662 Pages) FREESCALE

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Servicing the Host Interface

Host Interface Eight (HI8), Rev. 4

Freescale Semiconductor

16-33

The Host exception is triggered when HRDF = 1. The Host exception routine must read the Host

Receive Data Register HRX to clear HRDF.

The transfer from Steps 4 to 1 is automatic if TXDE = 1.

Note:

The execution of the Host exception on HRDF = 1 condition occurs after the transfer

to Step 1 and is independent of the handshake since it is only dependent on HRDF = 1.

16.10.9.2

Host-to-DSC Host Processor Procedure

The following procedure outlines the typical steps that the Host Processor must take to setup and

terminate a Host-to-DSC DMA transfer.

1. Setup the external DMA controller source address, direction, byte count, and other control

registers. Enable the DMA controller channel.

2. The DSC must be configured to handle the incoming Host data via polling, interrupts, or

DSC Side DMA configuration. If interrupt operation is desired HRIE must be set to enable

the HRDF interrupt. If DSC Side DMA operations are desired, set RDMAE to enable DSC

transfers when HRDF is set. This could be done with a separate Host Command exception

routine in the DSC.

3. Set TXDE and clear HRDF. This can be done with the appropriate Initialize function. The

Host must also initialize the DMA counter in the HI8 using the initialize feature. HREQ

output pin is asserted immediately by the DSC hardware which begins the DMA transfer.

4. Perform other tasks until interrupted by the DMA controller DMA complete interrupt. The

DSC Interface Control Register (ICR), the Interrupt Status Register (ISR), and RXH/RXL

may be accessed at any time by the Host Processor (using HA0-HA2, HRW/HRD,

HDS/HWR, and HCS) but the transmit byte registers (TXH/TXL) may not be accessed

until the DMA mode is disabled.

5. Terminate the DMA controller channel to disable DMA transfers.

6. Terminate the DSC HI8 DMA mode by clearing the HM1 and HM0 bits and clearing

TREQ in the Interface Control Register (ICR).

16.10.9.3 DSC-to-Host Interface Action

The following procedure outlines the steps that the HI8 hardware takes to transfer DMA data

from DSC memory to the Host data bus.

1. The transmit exception is triggered when HTIE = 1 and HTDE = 1, for Interrupt mode

transfers, or when TDMAE = 1 and HTDE = 1, for on-chip DMA

transfers. The exception routine software, or on-chip DMA, writes the data word into

HTX.

DSP56857 Datasheet(PDF) 459 Page - Freescale Semiconductor, Inc