DSP56857 datasheet(482/662 Pages) FREESCALE

482 / 662 page

TAP Controller

5685X Digital Signal Controller User Manual, Rev. 4

17-20

Freescale Semiconductor

Figure 17-7. TAP Controller State Diagram

The TAP Controller will execute the last instruction decoded until a new instruction is entered at

the Update-IR state, or Test-Logic-Reset is entered.

There are two paths through the 16-state machine. The shift-IR-scan path captures and loads

JTAG instructions into the JTAGIR. The shift-DR-scan path captures and loads data into the

other JTAG registers. The TAP Controller executes the last instruction decoded until a new

instruction is entered at the update-IR state, or until the test-logic-reset state is entered. When

using the JTAG port to access EOnCE module registers, follow these four steps:

1. Enable the TLM by shifting the TLM_SEL instruction into the JTAGIR.

2. When selected, the TLM must enable the 56800E TAP by shifting in the appropriate value

into the TLM register.

3. When the 56800E TAP is selected, the EOnCE module is selected by shifting the

ENABLE_EOnCE instruction.

Capture-DR

Shift-DR

Exit1-DR

Pause-DR

Exit2-DR

Update-DR

Select-IR-Scan

Capture-IR

Shift-IR

Exit1-IR

Pause-IR

Exit2-IR

Update-IR

Select-DR-Scan

Test-Logic-Reset F

Run-Test/Idle C

DSP56857 Datasheet(PDF) 482 Page - Freescale Semiconductor, Inc