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DSP56857 Datasheet(PDF) 578 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 578 Page - Freescale Semiconductor, Inc |
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578 / 662 page  Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-76 Preliminary 9 of 16 ESSI Control Register 4 (SCR4) denotes Reserved Bits Bits Name Description 10 TXSFO Transmit Status Flag Control 0 0 The indicated transmitter does not affect the status bits 1 The indicated transmitter status will affect the TFF, TDE, TUE, and TFE status bits 9 TXSF1 Transmit Status Flag Control 1 0 The indicated transmitter does not affect the status bits 1 The indicated transmitter status will affect the TFF, TDE, TUE, and TFE status bits 8 TXSF2 Transmit Status Flag Control 2 0 The indicated transmitter does not affect the status bits 1 The indicated transmitter status will affect the TFF, TDE, TUE, and TFE status bits 6 SSC1 Select SC1 This bit controls the functionality of the SC1 signal and is used only if SYN = 1 and TE2 = 0 0 The SC1 acts as the serial I/O flag (IF1/OF1) 1 When configured as an output (SCD1 = 1), the SC1 signal acts as the transmitter 0 driver-enable, enabling an external buffer for the transmitter 0 output 5 SCKD Clock Source Direction This bit configures the source of the clock signal used to clock the transmit shift register in Asynchronous mode and both Transmit and Receive Shift Registers are in Synchronous mode 0 SCK pin is configured as an input. This pin is used as the clock source 1 Internal transmit clock generator is selected. This clock is output on the SCK pin 4 SCD2 Serial Control Direction 2 This bit controls the direction of the SC2 pin 0 SC2 is an input 1 SC2 is an output ESSI Control Register 4 (SCR4) Base + $7 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read TXSFO TXSF1 TXSF2 SSC1 SCKD SCD2 SCD1 SCD0 OF1 OF0 Write Reset 00 000 0 0 0 0 0 0 0 0 0 0 0 ESSI See the following page for continuation of this register |
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