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DSP56857 Datasheet(PDF) 647 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 647 Page - Freescale Semiconductor, Inc |
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647 / 662 page  Application: Date: Programmer: Sheet C 56F853/854/855/857/858 Digital Signal Controller User Manual, Rev. 4 B-145 Freescale Semiconductor Preliminary HI8 9 of 10 Bits Name Description 7 - 0 RXH Receive Data High This read-only register receives data from the High Byte of the HTX register. It is selected by three external Host Address (HA2, HA1, and HA0) inputs during a Host Processor read operation or by an on-chip address counter in DMA operations. The Receive Byte Registers contain valid data when the Receive Data Register Full (RXDF) bit is set. The Host Processor can program the RREQ bit to assert the external HREQ pin when the RXDF bit is set. This informs the Host Processor or Host DMA controller of the Receive Byte Registers full condition. Reading the Data Register at Host Address $7 clears the RXDF bit. HI8 Receive Byte Registers (RXH, RXL) HI8 Receive Byte Registers (RXH) $1FFFD8 + $6/$7* Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read RXH Write Reset 0 00 000 00 00 00 00 00 denotes Reserved Bits Bits Name Description 7 - 0 RXL Receive Data Low This read-only register receives data from the Low Byte of the HTX register. It is selected by three external Host Address (HA2, HA1, and HA0) inputs during a Host Processor read operation or by an on-chip address counter in DMA operations. The Receive Byte Registers contain valid data when the Receive Data Register Full (RXDF) bit is set. The host processor may program the RREQ bit to assert the external HREQ pin when the RXDF bit is set. This informs the Host Processor or Host DMA controller of the Receive Byte Registers full condition. Reading the data register at Host Address $7 clears the RXDF bit. HI8 Receive Byte Registers (RXL) Base + $7/$6* Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read RXL Write Reset 00 00 00 00 00 0 00 00 0 * Depends on HLEND setting |
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