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ST7789V Datasheet(PDF) 32 Page - Sitronix Technology Co., Ltd. |
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ST7789V Datasheet(HTML) 32 Page - Sitronix Technology Co., Ltd. |
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32 / 308 page ![]() ST7789V Version 1.0 Page 32 of 308 2013/10 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. 6.2 Interface Logic Pins Name I/O Description Connect Pin IM3, IM2, IM1, IM0 I -The MCU interface mode select. IM3 IM2 IM1 IM0 MPU Interface Mode Data pin 0 0 0 0 80-8bit parallel I/F DB[7:0] 0 0 0 1 80-16bit parallel I/F DB[15:0] 0 0 1 0 80-9bit parallel I/F DB[8:0] 0 0 1 1 80-18bit parallel I/F DB[17:0], 3-line 9bit serial I/F SDA: in/out 0 1 0 1 2 data lane serial I/F SDA: in/out WRX: in 0 1 1 0 4-line 8bit serial I/F SDA: in/out 1 0 0 0 80-16bit parallel I/F Ⅱ DB[17:10], DB[8:1] 1 0 0 1 80-8bit parallel I/F Ⅱ DB[17:10] 1 0 1 0 80-18bit parallel I/F Ⅱ DB[17:0], 1 0 1 1 80-9bit parallel I/F Ⅱ DB[17:9] 1 1 0 1 3-line 9bit serial I/F Ⅱ SDA: in/ SDO: out 1 1 1 0 4-line 8bit serial I/F Ⅱ SDA:in/ SDO: out DGND/VDDI EXTC I -Select to access extension command (“Low”: system command 1, “High”: system command 1 and 2). -When programming NVM, this pin should connect to high level. DGND/VDDI VPP I -When programming NVM, it needs external power supply voltage (7.5V); the current of Ivpp must be more than 10mA. -If not used, let this pin open. - RESX I -This signal will reset the device and it must be applied to properly initialize the chip. -Signal is active low. MCU CSX I -Chip selection pin Low enable. High disable. MCU DCX I -Display data/command selection pin in parallel interface. -This pin is used to be serial interface clock. MCU |
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