FS98O24 datasheet(39/77 Pages) FORTUNE

Part #	FS98O24

Description	8-bit MCU with 4k program EPROM, 256-byte RAM

PDF	77 Pages

Scroll/Zoom	100%

Manufacturer	FORTUNE [Fortune Semiconductor Corp.]

Direct Link	https://www.ic-fortune.com/eng/index.asp

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8 bits Counter1

Watch Dog

Timer

Oscillator

Multiplex

WDTA[7:0]

WDTS[2:0]

8 bits Counter2

WDTOUT

CLRWDT

Figure 6-3 watch dog timer function block



The Watchdog timer is disable during Sleep, otherwise always enable.



When WDT Counter 2 overflows, it will send WDTOUT to reset the CPU and set TO flag.



CLRWDT instruction will reset WDT Counter 2



WTS [2:0] selects WDT Counter 2 and the code selections are as follows, 000: WDTA [0], 001: WDTA [1],

010: WDTA [2], 011: WDTA [3], 100: WDTA [4], 101: WDTA [5], 110: WDTA [6], 111: WDTA [7].

6.4. 8-bit Frequency Synthesizer

Address

Name

Content ( u mean unknown or unchanged)

Reset State

15H

PFCR

FINS FOUTS<1:0>

00000000

16H

FSD

Frequency Synthesis Data Register

00000000

Mux

P1<4>/FSI

MCK

FIN

Frequency Synthesis

FOUT=FIN/(2*(FSD+1))

FOUT

Mux

P1<5>O

P1<5>/FSO

FSD[7:0]

FINS

FOUTS<1:0>

Figure 6-4 Programmable Counter Working block diagram



When FINS=0, FIN=MCK; when FINS=1, FIN=P14/FSI.



The relationship is as bellow:

FOUTS<1>

FOUTS<0>

P1<5>/FSO

P1<5>O

FIN

FOUT

FS98O24 Datasheet(PDF) 39 Page - Fortune Semiconductor Corp.

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