FS98O24 datasheet(47/77 Pages) FORTUNE

47 / 77 page

Table 8-2 ADC function register table

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on Power on Reset

06H

INTF

ADIF

00000000

07H

INTE

GIE

ADIE

00000000

10H

ADOH

ADO [23:16]

00000000

11H

ADOM

ADO [15:8]

00000000

12H

ADOL

ADO [7:0]

00000000

13H

ADCON

ADCCLK[1:0] ADRST

ADM [2:0]

00000000

2AH

NETB

SINL [1:0]

SINH [2:0]

SFT [2:0]

00000000

2BH

NETD

SVRL

SVRH

00000000

2EH

NETG

ADG [1:0]

ADEN

00000000



The ADC (analog to digital converter) contains - modulator and digital comb filter. When ADRST=1,

comb filter will be enabled. When ADRST=0, the comb filter will be reset. ADEN=1 starts the -

modulator.



ADC Over Sample Frequency

ADCCLK[0]

ADC sample Frequency (ADCF)

MCK/25

MCK/50



The output rate is selected by ADM (N).

ADM (N)

ADC Output Rate

000

ADCF/125

001

ADCF/250

010

ADCF/500

011

ADCF/1000

100

ADCF/2000

101

ADCF/4000

110

ADCF/8000

111

ADCF/8000



AZ=0 means that the ADC differential inputs are (INH, INL); AZ= 1 means that the ADC

differential inputs are (INL, INL). We can use this mode to measure the ADC offset.



ADG [1:0] will set ADC input gain as follows, 00: 2/3, 01: 1, 10: 2, 11: 2 1/3.

FS98O24 Datasheet(PDF) 47 Page - Fortune Semiconductor Corp.

FS98O24 Datasheet(HTML) 47 Page - Fortune Semiconductor Corp.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

Datasheet Download

Link URL