Multilayer Ceramic Capacitors

Approval Sheet

Page 2 of 10

ASC_1825 2220 2225_025I_DS

May. 2019

1. HOW TO ORDER

2220

B

104

K

500

C

T

Size

Inch (mm)

1825 (4563)

2220 (5750)

2225 (5763)

Dielectric

N=NP0

B=X7R

Capacitance

Two significant

digits followed by

no. of zeros. And R

is in place of

decimal point.

eg.:

0R5=0.5pF

1R0=1.0pF

104=10x10

4

=100nF

Tolerance

F=±1%

G=±2%

J=±5%

K=±10%

M=±20%

Rated voltage

Two significant digits

followed by no. of zeros.

And R is in place of

decimal point.

250= 25 VDC

500= 50 VDC

101= 100 VDC

251= 250 VDC

501= 500 VDC

631= 630 VDC

102= 1000 VDC

152= 1500 VDC

202= 2000 VDC

252= 2500 VDC

302= 3000 VDC

402= 4000 VDC

Termination

C=Cu/Ni/Sn

Packaging style

T=7” reeled

2. EXTERNAL DIMENSIONS

3. GENERAL ELECTRICAL DATA

Dielectric

NP0

X7R

Size

1825, 2220, 2225

Capacitance*

10pF to 0.1

µF

1000pF to 10uF

Capacitance tolerance

F (±1%), G (±2%), J (±5%), K (±10%)

J (±5%), K (±10%), M (±20%)

Rated voltage (WVDC)

25V, 50V, 100V, 200V, 250V, 500V, 630V, 1000V, 1500V, 2000V, 2500V, 3000V, 4000V

Tan

δ*

Cap<30pF: Q

≥400+20C

Cap

≥30pF: Q≥1000

≤2.5%

Operating temperature

-55 to +125°C

Capacitance characteristic

±30ppm

±15%

Termination

Ni/Sn (lead-free termination)

*Measured at 1.0±0.2Vrms, 1.0MHz±10% for Cap

≤1000pF and 1.0±0.2Vrms, 1.0kHz±10% for Cap>1000pF, 25°C at ambient

temperature for NP0.

*Measured at 1.0±0.2Vrms, 1.0kHz±10% for C

≤10µF; 0.5±0.2Vrms, 120Hz±20% for C>10µF, 30~70% related humidity, 25°C ambient

temperature for X7R.

** Preconditioning for Class II MLCC: Perform a heat treatment at 150±10°C for 1 hour, then leave in a mbient condition for 24±2 hours

before measurement.

T

W

L

Fig. 1 The outline of MLCC

Size

Inch (mm)

L (mm)

W (mm)

T(mm) (Symbol)

1825 (4563)

4.50±0.40

6.30±0.40

2.00±0.20 (K)

2.50±0.30 (M)

2.80±0.30 (U)

0.75±0.35

2220 (5750)

5.70±0.40

5.00±0.40

0.85±0.35

2225 (5763)

5.70±0.40

6.30±0.40

0.85±0.35

# Reflow soldering only is recommended.